Real-time implementation of super-resolution imaging algorithm

The design and implementation of a real-time super-resolution imaging processor was conducted as a benchmark for the Rapid Prototyping of Application Specific Signal Processors (RASSP) program. RASSP is a DARPA/Tri-services sponsored program aimed at accelerating the design process for digital electronic systems. The super-resolution subsystem is part of a Semi-Automated Image-intelligence Processing (SAIP) system. The benchmark project required a reduction in the size and increase in performance of the prototype system, which had been implemented on an array of workstations. The RASSP methodology was applied to guide the design process and RASSP-related analysis tools were used to accelerate the software development. The numerical and run-time performance goals were achieved through a combination of software innovations in the imaging algorithm and porting to a high-density commercial off-the-shelf (COTS) high-performance parallel processor. The selected processor consisted of four Alex Computer boards containing a total of 72 ADSP-21060 (SHArc) signal processors.